New supercomputer will unite x86, Power9 and ARM chips
Source: Agam Shah
The MareNostrum 3 supercomputer at Barcelona Supercomputing Center. Credit: Barcelona Supercomputing Center
For once, there will be a ceasefire in the war between major chip architectures x86, ARM and Power9, which will all be used in a supercomputer being built in Barcelona.
The MareNostrum 4 is being built by the Barcelona Supercomputing Center and will have three clusters, each of which will house Intel x86, ARM and Power9 chips. Those clusters will be linked to form a supercomputer that will deliver up to 13.7 petaflops of performance.
All three architectures have never been implemented together in a supercomputer, let alone PCs or servers. It raises questions on how the architectures will work together.
The three chip architectures are fundamentally different. An application written to take advantage of a specific architecture won't work on another, but server architectures are changing so different types of systems can coexist. Linux supports x86, ARM and Power, so it's possible to write applications to work across architectures.
Emerging networking and throughput interfaces like Gen-Z and OpenCAPI also make it possible for companies to install servers based on different architectures in one data center. Those standards are meant to break the stranglehold of a single architecture, and also provide a blueprint to build a multi-architecture supercomputer like MareNostrum 4.
BSC's goal is to make a supercomputer using emerging technologies that can be used for all kinds of scientific calculations, the research institution said.
The computer will let researchers experiment with all sorts of alternative, cutting-edge computing technologies, said Scott Tease, executive director for Lenovo's HyperScale and High Performance Computing group, in an email.
One such technology involves low-power ARM chips, which dominate smartphones but are not yet used in supercomputers.
The system will share common networking and storage assets, Tease said. Lenovo is providing server and chip technologies for MareNostrum 4.
However, the performance of MareNostrum 4 isn't overwhelming, especially when compared to China's Sunway TaihuLight, which is the world's fastest computer. TaihuLight delivers 93 petaflops of peak performance.
BSC has a knack for developing experimental supercomputers like MareNostrum 4. Starting in 2011, BSC built multiple supercomputers using ARM-based smartphone chips. The Mont-Blanc and subsequent Pedraforca computers were rooted in the premise that supercomputers with smartphone chips could be faster and more power efficient than conventional server chips like Intel's Xeon or IBM's Power, which dominate high-performance computing.
But last year, ARM developed a new high-performance computing chip design with Fujitsu that will be implemented in MareNostrum 4. The chip has a heavy dose of vector processing, which has been a staple of supercomputers for decades.
The other ingredients of MareNostrum 4 include Lenovo server cabinets with Intel's current Xeon Phi supercomputing chip, code-named Knights Landing, and upcoming chip code-named Knights Hill. It will also have racks of computing nodes with IBM Power9 chips, which will ship next year.
The supercomputer will be implemented in phases and will replace the MareNostrum 3. It will have storage capacity of 24 petabytes.